/* lteenb configuration file version ##VERSION##
 * Copyright (C) 2015-2025 Amarisoft
 */

{
#define N_CELL              2
#define NR_SA               1 // Values: 0 (NR-NSA), 1(NR-SA)
#define NR_TDD              0 // Values: 0 (FDD), 1(TDD)
#define RX_ANTENNA          0 // Values: 0 (use TX connector as RX antenna in TDD), 1(use RX connector as RX antenna in TDD)
#define N_RB_DL             100 // Values: 6 (1.4MHz), 25 (5MHz), 50 (10MHz), 75 (15MHz), 100 (20MHz)
#define NR_BANDWIDTH        20
#define N_ANTENNA_DL        2 // Values: 1 (SISO), 2 (MIMO 2x2), 4 (MIMO 4x4)
#define N_NR_ANTENNA_DL     2
#define N_ANTENNA_UL        2 // Values: 1 (SISO), 2 (MIMO 2x2), 4 (MIMO 4x4)
#define CHANNEL_SIM         0 // Values: 0 (channel simulator disabled), 1 (channel simulator enabled)
#define USE_SRS             1
#define NR_SRS_PERIODIC     1 // Values: 0 (srs aperiodic enabled), 1 (srs periodic enabled)

#define UL_TX_SWITCH_OPT 0  // 0: switchedUL, 1: dualUL

#ifndef UL_TX_SWITCH_ACT
#define UL_TX_SWITCH_ACT 1 // 0: immediate, 1: UL quality
#endif


  /* Log filter: syntax: layer.field=value[,...]
  
     Possible layers are phy, mac, rlc, pdcp, rrc, nas, s1ap, x2ap, gtpu and
     all. The 'all' layer is used to address all the layers at the
     same time.

     field values:

     - 'level': the log level of each layer can be set to 'none',
     'error', 'info' or 'debug'. Use 'debug' to log all the messages.
     
     - 'max_size': set the maximum size of the hex dump. 0 means no
       hex dump. -1 means no limit.
  */
  log_options: "all.level=none,all.max_size=1,nas.level=debug,rrc.level=debug,phy.level=debug",

  //log_options: "all.level=warn,all.max_size=0,nas.level=debug,nas.max_size=1,rrc.level=debug,rrc.max_size=1",
  log_filename: "/tmp/enb0.log",

  /* Enable remote API and Web interface */
  com_addr: "0.0.0.0:9001",

  rf_driver: {
    name: "sdr",

#if N_ANTENNA_DL <= 2
    args: "dev0=/dev/sdr0,dev1=/dev/sdr1",
#else
    args: "dev0=/dev/sdr0,dev1=/dev/sdr1,dev2=/dev/sdr2,dev3=/dev/sdr3",
#endif

#if N_CELL > 2
#if N_ANTENNA_DL <= 2
    args: "dev0=/dev/sdr0,dev1=/dev/sdr1,dev2=/dev/sdr2",
#else
    args: "dev0=/dev/sdr0,dev1=/dev/sdr1,dev2=/dev/sdr2,dev3=/dev/sdr3,dev4=/dev/sdr4,dev5=/dev/sdr5",
#endif
#endif

    fifo_tx_time: 50,

    /* synchronisation source: internal, gps, external (default = internal) */
    // sync: "gps",
    rx_antenna:"rx", // force to use the RX connector in TDD as RX antenna 
  },

    tx_gain: 70,
    rx_gain: 20,

#if CHANNEL_SIM == 1
  rf_ports: [
    {
      channel_dl: {
        type: "awgn",
        snr: 30,
      },
    }  
  ],  
#endif
  

  amf_list: [
    {
      /* address of AMF for NGAP connection. Must be modified if the AMF runs on a different host. */
      amf_addr: "127.0.1.100",
    },
  ],
  /* GTP bind address (=address of the ethernet interface connected to
     the AMF). Must be modified if the AMF runs on a different host. */
  gtp_addr: "127.0.1.1",

  gnb_id_bits: 28,
  gnb_id: 0x12345,

  
  nr_support: true,
  
  //sched_latency_for_prb_max: 40,

  /* list of cells */
  cell_list: [],
  
  nr_cell_default: {
    ssb_subcarrier_spacing: 15, /* KHz */
    subcarrier_spacing: 15*1, /* kHz */
    bandwidth: 20, /* MHz */
    n_antenna_dl: N_NR_ANTENNA_DL, /* number of DL antennas */
    n_antenna_ul: N_ANTENNA_UL, /* number of UL antennas */

    //force_dl_schedule : true,
    //force_full_bsr: true,

    n_id_cell: 500,

#if !defined(TDD_CONFIG)
#define TDD_CONFIG    0
#endif

    /* force the timing TA offset (optional) */
//    n_timing_advance_offset: 39936,
#if NR_TDD == 1
    tdd_config: {
#if TDD_CONFIG == 0
      period: 10/1, /* in ms */
      dl_slots: 7,
      dl_symbols: 6,
      ul_slots: 2,
      ul_symbols: 1,
#elif TDD_CONFIG == 1
      period: 10/1, /* in ms */
      dl_slots: 2,
      dl_symbols: 6,
      ul_slots: 7,
      ul_symbols: 4,
#elif TDD_CONFIG == 2
      period: 10/1, /* in ms */
      dl_slots: 4,
      dl_symbols: 10,
      ul_slots: 5,
      ul_symbols: 0,     
#elif TDD_CONFIG == 3
      period: 10/1, /* in ms */
      dl_slots: 2,
      dl_symbols: 10,
      ul_slots: 7,
      ul_symbols: 0,    
#elif TDD_CONFIG == 4 /*only partial ul slot*/
      period: 10/1, /* in ms */
      dl_slots: 9,
      dl_symbols: 6,
      ul_slots: 0,
      ul_symbols: 6,   
#endif
    },
    ssb_pos_bitmap: "10000000",
#else
    ssb_pos_bitmap: "1000",
#endif
    ssb_period: 5, /* in ms */

#if NR_SA > 0
    // nr-sa
    plmn_list: [ {
      tac: 100,
      plmn: "00101",
      reserved: false,
      },
    ],

    cell_barred: false,
    intra_freq_reselection: true,
    q_rx_lev_min: -70,
    q_qual_min: -20,
    p_max: 10, /* dBm */
    inactivity_timer: 10000,
    si_window_length: 40,
#endif

    root_sequence_index: 1, /* PRACH root sequence index */

    /* Scheduling request period (slots). */
    sr_period: 40,

    dmrs_type_a_pos: 2,

    prach: {
#if NR_TDD == 1
#if TDD_CONFIG == 4
      prach_config_index: 78, /* format B4, subframe 9 */
#else        
      prach_config_index: 160, /* format B4, subframe 9 */
#endif
      msg1_subcarrier_spacing: 15*1, /* kHz */
#else
      prach_config_index: 16, /* subframe 1 every frame */
#endif
      msg1_fdm: 1,
      msg1_frequency_start: 0,
      zero_correlation_zone_config: 15,
      preamble_received_target_power: -110, /* in dBm */
      preamble_trans_max: 7,
      power_ramping_step: 4, /* in dB */
      ra_response_window: 10, /* in slots */
      restricted_set_config: "unrestricted_set",
      ra_contention_resolution_timer: 64, /* in ms */
      ssb_per_prach_occasion: 1,
      cb_preambles_per_ssb: 8,
    },

    pdcch: {

#if NR_SA > 0
      n_rb_coreset0: 48,
      n_symb_coreset0: 1,
      search_space0_index: 0,
      si_al_index: 2,
      dedicated_coreset: {
        rb_start: -1, /* -1 to have the maximum bandwidth */
        l_crb: -1, /* -1 means all the bandwidth */
        duration: 1,
        precoder_granularity: "sameAsREG_bundle",
      },
#else
      common_coreset: {
        rb_start: -1, /* -1 to have the maximum bandwidth */
        l_crb: -1, /* -1 means all the bandwidth */
        duration: 1,
        precoder_granularity: "sameAsREG_bundle",
      },
#endif
     
      css: {
        n_candidates: [ 0, 4, 2, 1, 0 ],
      },
      rar_al_index: 2,


      uss: {
        n_candidates: [ 8, 4, 2, 0, 0 ],
        dci_0_1_and_1_1: true,
      },
      al_index: 0,
    },

    pdsch: {
      mapping_type: "typeA",
      //start_symb: 1,
      //n_symb: 13,
      dmrs_add_pos: 1,
      dmrs_type: 1,
      dmrs_max_len: 1,
      mcs_table: "qam256",

      /* hardcoded scheduling parameters */
      dmrs_len: 1,
      
#if N_NR_ANTENNA_DL <= 2
      n_dmrs_cdm_groups: 1,
#else
      n_dmrs_cdm_groups: 2,
#endif

      //n_layer: N_NR_ANTENNA_DL,
      //mcs: 24,
      rar_mcs: 2,
#if NR_SA > 0
      si_mcs: 6, // nr-sa
#endif
    },

      csi_rs: {
        resource_auto: {
          nzp_csi_rs_period: 80,
       	  trs_presence: false,
      },
        csi_report_config: [
          {
            report_config_type: "periodic",
            period: 80,
          },
        ],
      },

#if !defined(AUTO_PUCCH)
#define AUTO_PUCCH    0
#endif
#if AUTO_PUCCH == 1
    pucch: {
      p0_nominal: -96,
      resource_auto: {
#if NR_LONG_PUCCH_FORMAT == 2
        formats: "format_0_and_2",
#elif NR_LONG_PUCCH_FORMAT == 3
        formats: "format_1_and_3",
#elif NR_LONG_PUCCH_FORMAT == 4
        formats: "format_1_and_4",
#endif
        ue_count: 1,
      }
    }, 
#else   
#if NR_TDD == 1
    pucch: {
      pucch_group_hopping: "neither",
      hopping_id: -1, /* -1 = n_cell_id */
      p0_nominal: -90,
      pucch1: {
        n_cs: 3,
        n_occ: 3,
        start_symb: 0,
        n_symb: 14,
        freq_hopping: false,
      },
      pucch4: {
        occ_len: 4,
        bpsk: false,
        additional_dmrs: false,
        start_symb: 0,
        n_symb: 14,
        freq_hopping: true,
      },
      #if 0 > 0
      n_rb_max: 0 /*floor(n_rb_ul/4)*/
      #endif
    },
    #else
    pucch: {
      pucch_group_hopping: "neither",
      hopping_id: -1, /* -1 = n_cell_id */
      p0_nominal: -90,
      pucch0: {
          initial_cyclic_shift: 1,
          n_symb: 1,
        },
      pucch2: {
          n_symb: 2,
          n_prb: 1,
          freq_hopping: true,
          simultaneous_harq_ack_csi: false, 
          max_code_rate: 0.25,
      },
      #if 0 > 0
      n_rb_max: 0 /*floor(n_rb_ul/4)*/
      #endif
    },
#endif  // tdd
#endif // auto pucch    
    
    pusch: {
      //mapping_type: "typeA",
      //n_symb: 14,
      dmrs_add_pos: 1,
      dmrs_type: 1,
      dmrs_max_len: 1,
      tf_precoding: false,
      mcs_table: "qam256", /* without transform precoding */
      mcs_table_tp: "qam256", /* with transform precoding */
      ldpc_max_its: 5,

      p0_nominal_with_grant: -90,
      msg3_mcs: 4,
      msg3_delta_power: 0, /* in dB */
      beta_offset_ack_index: 9,

      max_rank: N_ANTENNA_UL,

      /* hardcoded scheduling parameters */
      //n_layer: 1,
      //dmrs_len: 1,
      //n_dmrs_cdm_groups: 2,
      //mcs: 24,

      beta_offset_csi_part1_index: 7,
      beta_offset_csi_part2_index: 7,
    },

    /* MAC configuration */
    mac_config: {
       msg3_max_harq_tx: 5,
       ul_max_harq_tx: 5, /* max number of HARQ transmissions for uplink */
       dl_max_harq_tx: 5, /* max number of HARQ transmissions for downlink */
       ul_max_consecutive_retx: 30, /* disconnect UE if reached */
       dl_max_consecutive_retx: 30, /* disconnect UE if reached */
       periodic_bsr_timer: 20,
       retx_bsr_timer: 320,
       periodic_phr_timer: 500,
       prohibit_phr_timer: 200,
       phr_tx_power_factor_change: "dB3",
       sr_prohibit_timer: 0, /* in ms, 0 to disable the timer */
       sr_trans_max: 64,               
    },

    cipher_algo_pref: [],
    integ_algo_pref: [2, 1],

    srb3_support: false,

    drb_config: "drb_nr.cfg",
  },
  
  nr_cell_list: [
  {
    rf_port: 0,
    cell_id: 0x01,
    n_id_cell: 500,

    band: 7,
    dl_nr_arfcn: 526500,
    subcarrier_spacing: 15, /* kHz */
    ssb_pos_bitmap: "1000",

    scell_list : [
      {
        cell_id: 2,
        ul_allowed: true,
      },
#if N_CELL == 3
      {
        cell_id: 0x03,
        ul_allowed: true,
      }
#endif
    ],

    uplink_tx_switch: {
        role : "carrier1",
    },
  },
  {
    rf_port: 1,
    cell_id: 0x02,
    n_id_cell: 501,


    band: 38,
    dl_nr_arfcn: 522000,
    subcarrier_spacing: 30,
    ssb_subcarrier_spacing: 30,
    ssb_pos_bitmap: "10000000",

      /* TDD specifics */
      tdd_ul_dl_config: {
        pattern1: {
          period: 5, /* in ms */
          dl_slots: 5,
          dl_symbols: 6,
          ul_slots: 4,
          ul_symbols: 6,
        },
      },
      prach: {
	prach_config_index: 160, /* format B4, subframe 9 */
        msg1_subcarrier_spacing: 30, /* kHz */
        msg1_fdm: 1,
        msg1_frequency_start: -1,
        zero_correlation_zone_config: 15,
        preamble_received_target_power: -110,
        preamble_trans_max: 7,
        power_ramping_step: 4,
        ra_response_window: 20,
        restricted_set_config: "unrestricted_set",
        ra_contention_resolution_timer: 64, /* in ms */
        ssb_per_prach_occasion: 1,
        cb_preambles_per_ssb: 8,
      },

      pusch: {
	max_rank: 2,
      },

      uplink_tx_switch: {
        role : "carrier2",
#if UL_TX_SWITCH_ACT == 1
        activation: "ul_quality",
#endif
#if UL_TX_SWITCH_OPT == 1
        carrier2_slots : [0, 0, 0, 0, 0, 0, 0, 0, 1, 1],
#endif
      },

  },
#if N_CELL == 3
  {
      rf_port: 2,
      cell_id: 0x03,
      band: 38,
      dl_nr_arfcn: 518000,
      n_id_cell: 502,
      subcarrier_spacing: 30,
      ssb_subcarrier_spacing: 30,
      ssb_pos_bitmap: "01000000",
      /* TDD specifics */
      tdd_ul_dl_config: {
        pattern1: {
          period: 5, /* in ms */
          dl_slots: 5,
          dl_symbols: 6,
          ul_slots: 4,
          ul_symbols: 6,
        },
      },
      prach: {
	prach_config_index: 160, /* format B4, subframe 9 */
        msg1_subcarrier_spacing: 30, /* kHz */
        msg1_fdm: 1,
        msg1_frequency_start: -1,
        zero_correlation_zone_config: 15,
        preamble_received_target_power: -110,
        preamble_trans_max: 7,
        power_ramping_step: 4,
        ra_response_window: 20,
        restricted_set_config: "unrestricted_set",
        ra_contention_resolution_timer: 64, /* in ms */
        ssb_per_prach_occasion: 1,
        cb_preambles_per_ssb: 8,
      },
      uplink_tx_switch: {
        role : "carrier2",
#if UL_TX_SWITCH_ACT == 1
        activation: "ul_quality",
#endif
#if UL_TX_SWITCH_OPT == 1
        carrier2_slots : [0, 0, 0, 0, 0, 0, 0, 0, 1, 1],
#endif
      },
    }
#endif

  ],

  nr_cell_default: {

   n_antenna_dl:N_ANTENNA_DL,
   n_antenna_ul:N_ANTENNA_UL,

   pdsch: {
#if 1 > 0
     mcs_table: "qam256",
#else
     mcs_table: "qam64",
#endif

   },
   
   pusch: {
#if 1 > 0
     mcs_table: "qam256",
	 mcs_table_tp: "qam256",
#else
     mcs_table: "qam64",
	 mcs_table_tp: "qam64",
#endif
	 
#if USE_SRS > 0
     max_rank: N_ANTENNA_UL,
  #if NR_SRS_PERIODIC > 0	 
     tx_config: "codebook",
     codebook_subset: "non_coherent",
//   codebook_subset: "fully_and_partial_and_non_coherent",
  #else
     n_layer:  N_ANTENNA_UL,     
    #if N_ANTENNA_UL > 2
       n_dmrs_cdm_groups: 2,
    #endif
  #endif
#endif

   "dc_carrier_correction": false,
   },

#if USE_SRS == 1
#if NR_SRS_PERIODIC > 0
    srs: {
      resource_auto: {
        codebook: {
          resource_type: "periodic",
          period: 80, /* in slots */
        }
      }
    },
#else
    srs: {
      resource_auto: {
        codebook: {
          resource_type: "aperiodic",
          period: 80, /* in slots */
        }
      }
    },

#endif
#endif
   
  }

	
}