/* lteenb configuration file version 2024-04-17 * Copyright (C) 2019-2024 Amarisoft * NR SA FDD or TDD FR1 cell with RedCap support */ #define NR_TDD 0 // Values: 0 (NR FDD), 1(NR TDD) #define NR_BANDWIDTH 40 // NR cell bandwidth #define N_ANTENNA_DL 2 // Values: 1 (SISO), 2 (MIMO 2x2), 4 (MIMO 4x4) #define N_ANTENNA_UL 1 // Values: 1, 2, 4 #define NR_LONG_PUCCH_FORMAT 2 // Values: 2, 3, 4 /* define to 1 to enable periodic SRS with N_ANTENNA_UL ports. Uplink SU-MIMO is also enabled if N_ANTENNA_UL >= 2. Not all UEs support uplink SU-MIMO. */ #define USE_SRS 1 #ifndef INITIAL_RC_BWP #define INITIAL_RC_BWP 1 #endif { //log_options: "all.level=debug,all.max_size=1", log_options: "all.level=error,all.max_size=0,nas.level=debug,nas.max_size=1,ngap.level=debug,ngap.max_size=1,xnap.level=debug,xnap.max_size=1,rrc.level=debug,rrc.max_size=1", log_filename: "/tmp/gnb0.log", /* Enable remote API and Web interface */ com_addr: "[::]:9001", rf_driver: { name: "sdr", /* list of devices. 'dev0' is always the master. */ #if N_ANTENNA_DL >= 4 args: "dev0=/dev/sdr0,dev1=/dev/sdr1", #else args: "dev0=/dev/sdr0", #endif /* TDD: force the RX antenna on the RX connector */ rx_antenna: "rx", /* synchronisation source: none, internal, gps, external (default = none) */ // sync: "gps", }, tx_gain: 90.0, /* TX gain (in dB) */ rx_gain: 60.0, /* RX gain (in dB) */ amf_list: [ { /* address of AMF for NGAP connection. Must be modified if the AMF runs on a different host. */ amf_addr: "127.0.1.100", }, ], /* GTP bind address (=address of the ethernet interface connected to the AMF). Must be modified if the AMF runs on a different host. */ gtp_addr: "127.0.1.1", #ifdef GTP_U_BUNDLING gtp_use_packet_bundling: true, #endif gnb_id_bits: 28, gnb_id: 0x12345, en_dc_support: true, rf_ports: [ { }, ], /* list of cells */ cell_list: [], nr_cell_list: [ { rf_port: 0, cell_id: 0x01, #if NR_TDD == 1 band: 78, dl_nr_arfcn: 632628, /* 3489.42 MHz */ subcarrier_spacing: 30, /* kHz */ ssb_pos_bitmap: "10000000", #else band: 7, dl_nr_arfcn: 531000, /* 2655 MHz */ subcarrier_spacing: 15, /* kHz */ ssb_pos_bitmap: "0100", #endif force_dl_schedule : true, pdsch_mcs:2, force_full_bsr: true, }, ], /* nr_cell_list */ nr_cell_default: { bandwidth: NR_BANDWIDTH, /* MHz */ n_antenna_dl: N_ANTENNA_DL, n_antenna_ul: N_ANTENNA_UL, /* force the timing TA offset (optional) */ // n_timing_advance_offset: 39936, /* subframe offset to align with the LTE TDD pattern (optional) */ // subframe_offset: 2, #if NR_TDD == 1 tdd_ul_dl_config: { pattern1: { period: 5, /* in ms */ dl_slots: 7, dl_symbols: 6, ul_slots: 2, ul_symbols: 4, }, }, #endif ssb_period: 20, /* in ms */ n_id_cell: 500, plmn_list: [ { tac: 100, plmn: "00101", reserved: false, nssai: [ { sst: 1, }, /*{ sst: 2, }, { sst: 3, sd: 50, },*/ ], }, ], /*sib_sched_list: [ { filename: "sib2_nr.asn", si_periodicity: 16, }, { filename: "sib3_nr.asn", si_periodicity: 16, }, { filename: "sib4_nr.asn", si_periodicity: 32, }, ], sib9: { si_periodicity: 32 },*/ si_window_length: 40, cell_barred: false, intra_freq_reselection: true, q_rx_lev_min: -70, q_qual_min: -20, //p_max: 10, /* dBm */ root_sequence_index: 1, /* PRACH root sequence index */ /* Scheduling request period (slots). */ sr_period: 40, dmrs_type_a_pos: 2, /* to limit the number of HARQ feedback in UL, use pdsch_harq_ack_max; allows to workaround issues with SM-G977N for example */ //pdsch_harq_ack_max: 2, first_active_dl_bwp_id: 0, first_active_ul_bwp_id: 0, //half_duplex: false, prach: { #if NR_TDD == 1 prach_config_index: 160, /* format B4, subframe 9 */ msg1_subcarrier_spacing: 30, /* kHz */ #else prach_config_index: 16, /* subframe 1 every frame */ #endif msg1_fdm: 1, msg1_frequency_start: 6, zero_correlation_zone_config: 15, preamble_received_target_power: -110, /* in dBm */ preamble_trans_max: 7, power_ramping_step: 4, /* in dB */ #if NR_TDD == 1 ra_response_window: 20, /* in slots */ #else ra_response_window: 10, /* in slots */ #endif restricted_set_config: "unrestricted_set", ra_contention_resolution_timer: 64, /* in ms */ ssb_per_prach_occasion: 1, cb_preambles_per_ssb: 8, }, pdcch: { n_rb_coreset0: 48, n_symb_coreset0: 1, search_space0_index: 0, dedicated_coreset: { duration: 2, }, css: { n_candidates: [ 0, 4, 2, 1, 0 ], }, rar_al_index: 2, si_al_index: 2, uss: { n_candidates: [ 0, 4, 2, 0, 0 ], dci_0_1_and_1_1: true, }, al_index: 1, }, pdsch: { mapping_type: "typeA", dmrs_add_pos: 1, dmrs_type: 1, dmrs_max_len: 1, /* k0 delay in slots from DCI to PDSCH: automatic setting */ /* k1 delay in slots from PDSCH to PUCCH/PUSCH ACK/NACK: automatic setting */ mcs_table: "qam256", rar_mcs: 2, si_mcs: 6, /* If defined, force the PDSCH MCS for all UEs. Otherwise it is computed * based on DL channel quality estimation */ /* mcs: 24, */ }, csi_rs: { resource_auto: { nzp_csi_rs_period: 80, }, csi_report_config: [ { report_config_type: "periodic", period: 80, }, #if NR_BANDWIDTH > 20 { report_config_type: "periodic", period: 80, dl_bwp_id: 1, ul_bwp_id: 1, } #endif ], }, pucch: { pucch_group_hopping: "neither", hopping_id: -1, /* -1 = n_cell_id */ p0_nominal: -96, #if 1 pucch0: { initial_cyclic_shift: 1, n_symb: 1, }, #else pucch1: { n_cs: 3, n_occ: 3, freq_hopping: true, #if USE_SRS && NR_TDD == 0 n_symb: 12, #endif }, #endif #if NR_LONG_PUCCH_FORMAT == 2 pucch2: { n_symb: 2, n_prb: 1, freq_hopping: true, simultaneous_harq_ack_csi: false, max_code_rate: 0.25, }, #elif NR_LONG_PUCCH_FORMAT == 3 pucch3: { bpsk: false, additional_dmrs: false, freq_hopping: true, n_prb: 1, simultaneous_harq_ack_csi: true, max_code_rate: 0.25, }, #elif NR_LONG_PUCCH_FORMAT == 4 pucch4: { occ_len: 4, bpsk: false, additional_dmrs: false, freq_hopping: true, simultaneous_harq_ack_csi: true, max_code_rate: 0.25, }, #endif }, #if USE_SRS srs: { resource_auto: { codebook: { resource_type: "periodic", period: 80, /* in slots */ } } }, #endif pusch: { #if NR_BANDWIDTH > 20 ra_type: "type0", /* Allow for not contiguous allocation around PUCCH of Redcap BWP */ #endif dmrs_add_pos: 1, mcs_table: "qam256", ldpc_max_its: 5, /* k2, msg3_k2 delay in slots from DCI to PUSCH: automatic setting */ p0_nominal_with_grant: -84, msg3_mcs: 4, msg3_delta_power: 0, /* in dB */ #if USE_SRS max_rank: N_ANTENNA_UL, #endif /* if defined, force the PUSCH MCS for all UEs. Otherwise it is computed from the last received PUSCH. */ /* mcs: 16, */ }, /* MAC configuration */ mac_config: { msg3_max_harq_tx: 5, ul_max_harq_tx: 5, /* max number of HARQ transmissions for uplink */ dl_max_harq_tx: 5, /* max number of HARQ transmissions for downlink */ ul_max_consecutive_retx: 30, /* disconnect UE if reached */ dl_max_consecutive_retx: 30, /* disconnect UE if reached */ periodic_bsr_timer: 20, retx_bsr_timer: 320, periodic_phr_timer: 500, prohibit_phr_timer: 200, phr_tx_power_factor_change: "dB3", sr_prohibit_timer: 0, /* in ms, 0 to disable the timer */ sr_trans_max: 64, }, dl_bwp: [ { bwp_id: 1, dl_bwp_rb_start: 0, dl_bwp_l_crb: 51, dl_bwp_access: "redcap_only", pdcch: { dedicated_coreset: {}, css: {}, uss: {}, }, pdsch: { mcs_table: "qam64LowSE", }, }, { bwp_id: 2, dl_bwp_rb_start: 53, dl_bwp_l_crb: 51, dl_bwp_access: "redcap_only", ssb_nr_arfcn: 0,//532620, pdcch: { common_coreset: {}, dedicated_coreset: {}, css: {}, uss: {}, }, pdsch: { mcs_table: "qam256", }, }], ul_bwp: [ { bwp_id: 1, ul_bwp_rb_start: 0, ul_bwp_l_crb: 51, ul_bwp_access: "redcap_only", pucch: { n_rb_max: 3, short_pucch_an_rsc_count: 4, long_pucch_an_rsc_count: 4, }, pusch: { ra_type: "type1", mcs_table: "qam64LowSE", /* without transform precoding */ }, srs: { resource_auto: { codebook: { resource_type: "periodic", period: 80, } } }, #if INITIAL_RC_BWP == 1 prach: { msg1_frequency_start: 12 }, #endif }, { bwp_id: 2, ul_bwp_rb_start: 53, ul_bwp_l_crb: 51, ul_bwp_access: "redcap_only", pucch: { n_rb_max: 3, short_pucch_an_rsc_count: 4, long_pucch_an_rsc_count: 4, }, pusch: { ra_type: "type1", mcs_table: "qam64LowSE", /* without transform precoding */ }, #if INITIAL_RC_BWP == 2 prach: { msg1_frequency_start: 0 }, #endif }], redcap_ue: { half_duplex: { //dl_k1_max: 10, dl_ul_guard_symb: 2, ul_dl_guard_symb: 1, dl_bwp_list: [ 1, 2 ], ul_bwp_list: [ 1, 2 ], }, initial_dl_bwp_id: INITIAL_RC_BWP, initial_ul_bwp_id: INITIAL_RC_BWP, }, cipher_algo_pref: [], integ_algo_pref: [2, 1], inactivity_timer: 10000, drb_config: "drb_nr.cfg", }, }